//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this sample source code is subject to the terms of the Microsoft
// license agreement under which you licensed this sample source code. If
// you did not accept the terms of the license agreement, you are not
// authorized to use this sample source code. For the terms of the license,
// please see the license agreement between you and Microsoft or, if applicable,
// see the LICENSE.RTF on your install media or the root of your tools installation.
// THE SAMPLE SOURCE CODE IS PROVIDED "AS IS", WITH NO WARRANTIES OR INDEMNITIES.
//
//
// (C) Copyright 2006 Marvell International Ltd.
// All Rights Reserved
//
/******************************************************************************
**
**  COPYRIGHT (C) 2004 Intel Corporation.
**
**  This software as well as the software described in it is furnished under
**  license and may only be used or copied in accordance with the terms of the
**  license. The information in this file is furnished for informational use
**  only, is subject to change without notice, and should not be construed as
**  a commitment by Intel Corporation. Intel Corporation assumes no
**  responsibility or liability for any errors or inaccuracies that may appear
**  in this document or any software that may be provided in association with
**  this document. 
**  Except as permitted by such license, no part of this document may be 
**  reproduced, stored in a retrieval system, or transmitted in any form or by
**  any means without the express written consent of Intel Corporation. 
**
**  FILENAME:  xllp_lcd.h
**
**  PURPOSE:   Common header file for XLLP LCD controller. 
**
*******************************************************************************/
#ifndef __XLLP_LCD_H__
#define __XLLP_LCD_H__

#ifdef __cplusplus
extern "C" {
#endif

#include "xllp_defs.h"

#include "xllp_clkmgr.h"
#include "xllp_mfp.h"

//------------------------------------------------------------------------------------
// XLLP LCD Public Data Structure and API
//------------------------------------------------------------------------------------

typedef struct  
{
	XLLP_VUINT32_T FDADR;		// Pointer to next frame descriptor (Physical address)
	XLLP_VUINT32_T FSADR;		// Pointer to the data (Physical address)
	XLLP_VUINT32_T FIDR;		// Frame descriptor ID
	XLLP_VUINT32_T LDCMD;		// DMA command
} LCD_FRAME_DESCRIPTOR;

typedef struct
{
	XLLP_UINT32_T OverlayHeight;
	XLLP_UINT32_T OverlayWidth;
	XLLP_UINT32_T X_Position;
	XLLP_UINT32_T Y_Position;
	XLLP_UINT32_T Format; // needed only for Overlay 2.
	XLLP_UINT32_T DegradeBaseFrame;
	XLLP_UINT32_T OverlayBPP;
// Following is only for internal use.
// They need no initialization.	
	XLLP_UINT32_T TmpBPP;
	XLLP_UINT32_T ch2_size;
	XLLP_UINT32_T ch3_size;
	XLLP_UINT32_T ch4_size;
} XLLP_OVERLAY_T, *P_XLLP_OVERLAY_T;

typedef enum
{
     WFS_ALL,
     WFS_ANY
} WFS_TYPE;

enum
{
	PCD_104M,
	PCD_156M,
	PCD_208M,
	PCD_MLCD,
	PCD_D0CS
};

#define CLK_OPTION_MAX 5

typedef struct
{
	XLLP_UINT32_T BLW;
	XLLP_UINT32_T ELW;
	XLLP_UINT32_T HSW;
	XLLP_UINT32_T BFW;
	XLLP_UINT32_T EFW;
	XLLP_UINT32_T VSW;
	XLLP_UINT32_T PCD[CLK_OPTION_MAX];
} tft_timing_t;

typedef struct
{
	XLLP_UINT32_T OEP;	// output enable
	XLLP_UINT32_T PCP;	// pixel clock
	XLLP_UINT32_T HSP;
	XLLP_UINT32_T VSP;
} tft_polarity_t;

typedef struct
{
	XLLP_UINT32_T BLW;	// WR, RD pulse width
	XLLP_UINT32_T ELW;	// A0, CS, setup/hold
	XLLP_UINT32_T HSW;	// output hold
	XLLP_UINT32_T PCD;	// command inhibit
	XLLP_UINT32_T SYNC_CNT; // synchronous count, count after vsync signal
} smart_timing_t;

struct XLLP_LCD_S;
struct XLLP_MINI_LCD_S;

typedef enum
{
	LCD_TFT,
	LCD_SMART
} XLLP_LCD_PANEL_TYPE;

typedef struct
{
	XLLP_LCD_PANEL_TYPE type;
	XLLP_UINT32_T width;
	XLLP_UINT32_T height;
	void (*set_power_mode) (struct XLLP_LCD_S *pXllpLCD, XLLP_UINT32_T power_mode);
} any_panel_t;

typedef struct
{
	XLLP_LCD_PANEL_TYPE type;
	XLLP_UINT32_T width;
	XLLP_UINT32_T height;
	void (*set_power_mode) (struct XLLP_LCD_S *pXllpLCD, XLLP_UINT32_T power_mode);

	XLLP_STATUS_T (*init_pins) (struct XLLP_LCD_S *pXllpLCD);
	XLLP_STATUS_T (*init_mini_lcd_pins) (struct XLLP_MINI_LCD_S *pXllpLCD, int is_on);
	XLLP_STATUS_T (*post_init) (struct XLLP_LCD_S *pXllpLCD);

	tft_timing_t timing;
	tft_polarity_t polarity;
} tft_panel_t;

typedef struct
{
	XLLP_LCD_PANEL_TYPE type;
	XLLP_UINT32_T width;
	XLLP_UINT32_T height;
	void (*set_power_mode) (struct XLLP_LCD_S *pXllpLCD, XLLP_UINT32_T power_mode);

	XLLP_UINT32_T update_width;
	XLLP_UINT32_T update_height;

	void (*reset_panel) (struct XLLP_LCD_S *pXllpLCD);
	XLLP_STATUS_T (*init_pins) (struct XLLP_LCD_S *pXllpLCD);
	void (*init_cmd) (struct XLLP_LCD_S *pXllpLCD);
	void (*write_ram_cmd) (struct XLLP_LCD_S *pXllpLCD); 
	void (*power_mode_cmd) (struct XLLP_LCD_S *pXllpLCD, XLLP_UINT32_T power_mode);
	void (*set_update_area) (struct XLLP_LCD_S *pXllpLCD, 
									  XLLP_UINT32_T x1, XLLP_UINT32_T y1, 
									  XLLP_UINT32_T x2, XLLP_UINT32_T y2);
	smart_timing_t timing;
} smart_panel_t;

typedef union
{
	XLLP_LCD_PANEL_TYPE type;
	any_panel_t any;
	tft_panel_t tft;
	smart_panel_t smart;
} lcd_panel_t;


typedef struct XLLP_LCD_S
{
	// peripheral handles
	XLLP_VUINT32_T *MFP;
	P_XLLP_MFP_RM_DB_ID_T pMfpRmDb;	
	XLLP_VUINT32_T *GPIO;						
	XLLP_VUINT32_T *CLKMan;					
	XLLP_VUINT32_T *LCDC;
	XLLP_VUINT32_T *SSP; // Only needed for panels with SSP control port.
	XLLP_VUINT32_T *OST;
	XLLP_VUINT32_T *I2C;
	
	// display characters
	XLLP_UINT32_T BPP;
	XLLP_UINT32_T PixelDataFormat;

	// frame buffers
	// Palette is used only in palette color mode.
	// Ch2_YCbCr_Y is used only for overlays.
	// Ch3_YCbCr_Cb is used only for overlay 2 YCbCr mode.
	// Ch4_YCbCr_Cr is used only for overlay 2 YCbCr mode.
	XLLP_UINT32_T _FRAME_BUFFER_BASE_PHYSICAL;				
	XLLP_UINT32_T _PALETTE_BUFFER_BASE_PHYSICAL;
	XLLP_UINT32_T _OVERLAY2_Y_CHANNEL_BASE_PHYSICAL;
	XLLP_UINT32_T _OVERLAY2_Cb_CHANNEL_BASE_PHYSICAL;
	XLLP_UINT32_T _OVERLAY2_Cr_CHANNEL_BASE_PHYSICAL;
	XLLP_UINT32_T _COMMAND_BUFFER_BASE_PHYSICAL;
	XLLP_UINT16_T *cmd_buf;
	XLLP_UINT32_T cmd_max;
	// The memory for following desc need to be allocated if the corresponding channel is used,
	// while the content in the memory need not to be initialized.
	// _DMA_CHANNEL_0_ALT_FRAME_DESCRIPTOR_BASE_PHYSICAL/frameDescriptorCh0fd2 is used only if a palette load is performed.

	// frame descriptors (physical address)
	XLLP_UINT32_T _DMA_CHANNEL_0_FRAME_DESCRIPTOR_BASE_PHYSICAL;	
	XLLP_UINT32_T _DMA_CHANNEL_0_ALT_FRAME_DESCRIPTOR_BASE_PHYSICAL;
	XLLP_UINT32_T _PALETTE_FRAME_DESCRIPTOR_BASE_PHYSICAL;
	XLLP_UINT32_T _DMA_CHANNEL_2_Y_FRAME_DESCRIPTOR_BASE_PHYSICAL;
	XLLP_UINT32_T _DMA_CHANNEL_3_Cb_FRAME_DESCRIPTOR_BASE_PHYSICAL;
	XLLP_UINT32_T _DMA_CHANNEL_4_Cr_FRAME_DESCRIPTOR_BASE_PHYSICAL;
	XLLP_UINT32_T _DMA_CHANNEL_6_COMMAND_DESCRIPTOR_BASE_PHYSICAL;

	// frame descriptors (virtual address)
	LCD_FRAME_DESCRIPTOR *frameDescriptorCh0fd1;
	LCD_FRAME_DESCRIPTOR *frameDescriptorCh0fd2;
	LCD_FRAME_DESCRIPTOR *frameDescriptorPalette;
	LCD_FRAME_DESCRIPTOR *frameDescriptorCh2_YCbCr_Y; 
	LCD_FRAME_DESCRIPTOR *frameDescriptorCh3_YCbCr_Cb;
	LCD_FRAME_DESCRIPTOR *frameDescriptorCh4_YCbCr_Cr;
	LCD_FRAME_DESCRIPTOR *frameDescriptorCh6_command;

// Fields for internal use. Need no initialization by user.
	XLLP_UINT32_T FrameBufferSize;
	XLLP_UINT32_T PaletteSize; 
	XLLP_UINT16_T *cmd_current;
	XLLP_OVERLAY_T *overlay2;
	// The following are init by panel init or switch codes.
	// smart panel or tft panel
	lcd_panel_t *panel;
} XLLP_LCD_T, *P_XLLP_LCD_T;

typedef struct XLLP_MINI_LCD_S
{
	XLLP_VUINT32_T *MFP;
	XLLP_VUINT32_T *CLKMan;	
	XLLP_VUINT32_T *MLCD;
	
	XLLP_UINT32_T SRAM_phys;
	XLLP_UINT32_T SRAM_virt;
	XLLP_UINT32_T SRAMQuota;
	tft_panel_t *panel;
} XLLP_MINI_LCD_T, *P_XLLP_MINI_LCD_T;

// Use the following for base frame BPP values in XLLP_LCD_T
#define BPP_1 			0x001
#define BPP_2 			0x002
#define BPP_4 			0x004
#define BPP_8 			0x008
#define BPP_16 			0x010
#define BPP_18 			0x020
#define BPP_18_PACKED 	0x040
#define BPP_19 			0x080
#define BPP_19_PACKED	0x100
#define BPP_24 			0x200
#define BPP_25 			0x400

// Use the following for overlay BPP values in XLLP_OVERLAY_T
#define O_BPP_4				0x2
#define O_BPP_8 			0x3
#define O_BPP_16 			0x4
#define O_BPP_18 			0x5
#define O_BPP_18_PACKED 	0x6
#define O_BPP_19 			0x7
#define O_BPP_19_PACKED		0x8
#define O_BPP_24 			0x9
#define O_BPP_25 			0xA

// Use the following for PixelDataFormat values in XLLP_LCD_T
#define PDFOR_00		0x0
#define PDFOR_01		0x1
#define PDFOR_10		0x2
#define PDFOR_11		0x3

// Use the following for Format values in XLLP_OVERLAY_T
#define FORMAT_RGB			0x0
#define FORMAT_PACKED_444	0x1
#define FORMAT_PLANAR_444	0x2
#define FORMAT_PLANAR_422	0x3
#define FORMAT_PLANAR_420	0x4

// Use the following for SuspendType of XllpLCDSuspend
#define Suspend_Graceful 	0
#define Suspend_Immediate 	1

// Use the following for changeFlag of XllpLCD_Overlay2_DynChange
#define Change_Size_Position		0x1
#define Change_FrameBuffer			0x2
#define Change_Wait_For_Complete	0x4

// Use the following for hss values of XllpLCDAdjustPCD
#define HSS_104M			0x0
#define HSS_156M			0x1
#define HSS_208M			0x2
#define HSS_AUTO_DETECT		0x4

// Public API functions
XLLP_STATUS_T XllpLCDInit(P_XLLP_LCD_T pXllpLCD);
XLLP_STATUS_T XllpLCD_Overlay2_Enable(P_XLLP_LCD_T pXllpLCD, 
									  P_XLLP_OVERLAY_T pXllpOverlay);
void XllpLCD_Overlay2_Disable(P_XLLP_LCD_T pXllpLCD);
XLLP_STATUS_T XllpLCD_Overlay2_DynChange(P_XLLP_LCD_T pXllpLCD, 
										 XLLP_UINT32_T changeFlag);
void XllpLCDLoadPalette(P_XLLP_LCD_T pXllpLCD);
void XllpLCDSuspend(P_XLLP_LCD_T pXllpLCD, int SuspendType);
void XllpLCDResume(P_XLLP_LCD_T pXllpLCD);
void XllpLCDSetDisplayPage(P_XLLP_LCD_T pXllpLCD, int page);
void XllpLCDUpdateClock(P_XLLP_LCD_T pXllpLCD, XLLP_UINT32_T hss);
void XllpLCDTurnOffBaseFrame(P_XLLP_LCD_T pXllpLCD,
                             unsigned char r,
                             unsigned char g,
                             unsigned char b);
void XllpMiniLCDEnable(P_XLLP_MINI_LCD_T pXllpMiniLCD);
void XllpMiniLCDDisable(P_XLLP_MINI_LCD_T pXllpMiniLCD);
XLLP_STATUS_T XllpMiniLCDEncode(P_XLLP_MINI_LCD_T pXllpMiniLCD, 
								  XLLP_UINT32_T FrameSource, 
								  P_XLLP_UINT32_T pByteCount);


XLLP_STATUS_T XllpLCDSmartPanelOn(P_XLLP_LCD_T pXllpLCD);
void XllpLCDSmartSetBaseFrame(P_XLLP_LCD_T pXllpLCD,
							  XLLP_UINT32_T base_frame_phy,
							  XLLP_UINT32_T bpp,
							  XLLP_UINT32_T width,
							  XLLP_UINT32_T height);
void XllpLCDSmartUpdateSetup(P_XLLP_LCD_T pXllpLCD, XLLP_UINT16_T x, XLLP_UINT16_T y);
void XllpLCDSmartUpdateDone(P_XLLP_LCD_T pXllpLCD);
void XllpLCDSmartUpdateFrameData(P_XLLP_LCD_T pXllpLCD, XLLP_UINT16_T x, XLLP_UINT16_T y);


int WaitForState(XLLP_VUINT32_T *pOSTRegs, 
				 XLLP_VUINT32_T *pStatusReg, 
				 unsigned int mask, 
				 WFS_TYPE wait_type, 
				 unsigned int max_ms);

void LCDInitDMA(P_XLLP_LCD_T pXllpLCD);
void LCDInitControllerCommon(P_XLLP_LCD_T pXllpLCD);
void LCDInitOverlay2DMA(P_XLLP_LCD_T pXllpLCD, P_XLLP_OVERLAY_T pXllpOverlay);
XLLP_UINT32_T LCDControllerBPP(XLLP_UINT32_T bpp);

XLLP_STATUS_T TFTInit(P_XLLP_LCD_T pXllpLCD);
void TFTResume(P_XLLP_LCD_T pXllpLCD);
void TFTUpdateClock(P_XLLP_LCD_T pXllpLCD, XLLP_UINT32_T hss);
void TFTFlip(P_XLLP_LCD_T pXllpLCD, XLLP_UINT32_T frame_phy_addr);
XLLP_STATUS_T TFT_Overlay2_Enable(P_XLLP_LCD_T pXllpLCD, P_XLLP_OVERLAY_T pXllpOverlay);
void TFT_Overlay2_Disable(P_XLLP_LCD_T pXllpLCD);
XLLP_STATUS_T TFT_Overlay2_DynChange(P_XLLP_LCD_T pXllpLCD, XLLP_UINT32_T changeFlag);

XLLP_STATUS_T SmartInit(P_XLLP_LCD_T pXllpLCD);
void SmartResume(P_XLLP_LCD_T pXllpLCD);
void SmartUpdateClock(P_XLLP_LCD_T pXllpLCD, XLLP_UINT32_T hss);
void SmartFlip(P_XLLP_LCD_T pXllpLCD, XLLP_UINT32_T frame_phy_addr);
XLLP_STATUS_T Smart_Overlay2_Enable(P_XLLP_LCD_T pXllpLCD, P_XLLP_OVERLAY_T pXllpOverlay);
void Smart_Overlay2_Disable(P_XLLP_LCD_T pXllpLCD);
XLLP_STATUS_T Smart_Overlay2_DynChange(P_XLLP_LCD_T pXllpLCD, XLLP_UINT32_T changeFlag);
XLLP_STATUS_T SmartLoadCommand(P_XLLP_LCD_T pXllpLCD, XLLP_UINT16_T *cmdBuf, int cmdNum);
void SmartSendCommand(P_XLLP_LCD_T pXllpLCD);

#define XLLP_LCD_CMD_READ_STATUS_REG     (0x0 << 9)
#define XLLP_LCD_CMD_READ_FRAME_BUFF     (0x0 << 9)
#define XLLP_LCD_CMD_COMMAND_WRITE       (0x1 << 9)
#define XLLP_LCD_CMD_DATA_WRITE          (0x1 << 9)
#define XLLP_LCD_CMD_FRAME_DATA_WRITE    (0x2 << 9)
#define XLLP_LCD_CMD_WAIT_FOR_VSYNC      (0x3 << 9)
#define XLLP_LCD_CMD_NOP                 (0x4 << 9)
#define XLLP_LCD_CMD_INT_PROC            (0x5 << 9)
#define XLLP_LCD_CMD_A0_COMMAND          (0x0 << 8)
#define XLLP_LCD_CMD_A0_DATA             (0x1 << 8)

#define XLLP_MAKEUP_CMD(x) (XLLP_LCD_CMD_COMMAND_WRITE|XLLP_LCD_CMD_A0_COMMAND|(x))
#define XLLP_MAKEUP_DATA(x) (XLLP_LCD_CMD_DATA_WRITE|XLLP_LCD_CMD_A0_DATA|(x))

//------------------------------------------------------------------------------------
// Some Useful Register Definitions
//------------------------------------------------------------------------------------

//
// LCD Controller Register Definitions, associated data structures and bit macros
//

typedef struct  
{
	XLLP_VUINT32_T lccr0;			// 0x4400 0000
	XLLP_VUINT32_T lccr1;			// 0x4400 0004
	XLLP_VUINT32_T lccr2;			// 0x4400 0008
	XLLP_VUINT32_T lccr3;			// 0x4400 000C
	XLLP_VUINT32_T lccr4;			// 0x4400 0010
	XLLP_VUINT32_T lccr5;			// 0x4400 0014
	XLLP_VUINT32_T lccr6;			// 0x4400 0018
	XLLP_VUINT32_T reserved0;		// 0x4400 001C
	XLLP_VUINT32_T fbr0;			// 0x4400 0020
	XLLP_VUINT32_T fbr1;			// 0x4400 0024
	XLLP_VUINT32_T fbr2;			// 0x4400 0028
	XLLP_VUINT32_T fbr3;			// 0x4400 002C
	XLLP_VUINT32_T fbr4;			// 0x4400 0030
	XLLP_VUINT32_T lcsr1;			// 0x4400 0034
	XLLP_VUINT32_T lcsr0;			// 0x4400 0038
	XLLP_VUINT32_T liidr;			// 0x4400 003C
	XLLP_VUINT32_T trgbr;			// 0x4400 0040
	XLLP_VUINT32_T tcr;				// 0x4400 0044
	XLLP_VUINT32_T reserved1[2];  	// 0x4400 0048
	XLLP_VUINT32_T ovl1c1;			// 0x4400 0050
	XLLP_VUINT32_T reserved2[3];	// 0x4400 0054
	XLLP_VUINT32_T ovl1c2;			// 0x4400 0060
	XLLP_VUINT32_T reserved3[3];	// 0x4400 0064
	XLLP_VUINT32_T ovl2c1;			// 0x4400 0070
	XLLP_VUINT32_T reserved4[3];	// 0x4400 0074
	XLLP_VUINT32_T ovl2c2;			// 0x4400 0080
	XLLP_VUINT32_T reserved5[3];	// 0x4400 0084
	XLLP_VUINT32_T ccr;				// 0x4400 0090
	XLLP_VUINT32_T reserved6[27];	// 0x4400 0094
	XLLP_VUINT32_T cmdcr;			// 0x4400 0100
	XLLP_VUINT32_T prsr;			// 0x4400 0104
	XLLP_VUINT32_T reserved7[2];	// 0x4400 0108
	XLLP_VUINT32_T fbr5;			// 0x4400 0110
	XLLP_VUINT32_T fbr6;			// 0x4400 0114
	XLLP_VUINT32_T reserved8[58]; 	// 0x4400 0118
	XLLP_VUINT32_T fdadr0;			// 0x4400 0200
	XLLP_VUINT32_T fsadr0;			// 0x4400 0204
	XLLP_VUINT32_T fidr0;			// 0x4400 0208
	XLLP_VUINT32_T ldcmd0;			// 0x4400 020C
	XLLP_VUINT32_T fdadr1;			// 0x4400 0210
	XLLP_VUINT32_T fsadr1;			// 0x4400 0214
	XLLP_VUINT32_T fidr1;			// 0x4400 0218
	XLLP_VUINT32_T ldcmd1;			// 0x4400 021C
	XLLP_VUINT32_T fdadr2;			// 0x4400 0220
	XLLP_VUINT32_T fsadr2;			// 0x4400 0224
	XLLP_VUINT32_T fidr2;			// 0x4400 0228
	XLLP_VUINT32_T ldcmd2;			// 0x4400 022C
	XLLP_VUINT32_T fdadr3;			// 0x4400 0230
	XLLP_VUINT32_T fsadr3;			// 0x4400 0234
	XLLP_VUINT32_T fidr3;			// 0x4400 0238
	XLLP_VUINT32_T ldcmd3;			// 0x4400 023C
	XLLP_VUINT32_T fdadr4;			// 0x4400 0240
	XLLP_VUINT32_T fsadr4;			// 0x4400 0244
	XLLP_VUINT32_T fidr4;			// 0x4400 0248
	XLLP_VUINT32_T ldcmd4;			// 0x4400 024C
	XLLP_VUINT32_T fdadr5;			// 0x4400 0250
	XLLP_VUINT32_T fsadr5;			// 0x4400 0254
	XLLP_VUINT32_T fidr5;			// 0x4400 0258
	XLLP_VUINT32_T ldcmd5;			// 0x4400 025C
	XLLP_VUINT32_T fdadr6;			// 0x4400 0260
	XLLP_VUINT32_T fsadr6;			// 0x4400 0264
	XLLP_VUINT32_T fidr6;			// 0x4400 0268
	XLLP_VUINT32_T ldcmd6;			// 0x4400 026C
} XLLP_LCD_REGISTERS_T;

//
// LCD Controller Control Register 0 (LCCR0)
//
#define XLLP_LCCR0_ENB		(0x1u<<0)
#define XLLP_LCCR0_CMS		(0x1u<<1)
#define XLLP_LCCR0_SDS		(0x1u<<2)
#define XLLP_LCCR0_LDM		(0x1u<<3)
#define XLLP_LCCR0_SOFM0	(0x1u<<4)
#define XLLP_LCCR0_IUM		(0x1u<<5)
#define XLLP_LCCR0_EOFM0	(0x1u<<6)
#define XLLP_LCCR0_PAS		(0x1u<<7)
#define XLLP_LCCR0_DPD		(0x1u<<9)
#define XLLP_LCCR0_DIS		(0x1u<<10)
#define XLLP_LCCR0_QDM		(0x1u<<11)
#define XLLP_LCCR0_PDD(n)	((n)<<12)
#define XLLP_LCCR0_PDD_MASK	(0xffu<<12)
#define XLLP_LCCR0_BSM0		(0x1u<<20)
#define XLLP_LCCR0_OUM		(0x1u<<21)
#define XLLP_LCCR0_LCDT		(0x1u<<22)
#define XLLP_LCCR0_RDSTM	(0x1u<<23)
#define XLLP_LCCR0_CMDIM	(0x1u<<24)
#define XLLP_LCCR0_OUC		(0x1u<<25)
#define XLLP_LCCR0_LDDALT	(0x1u<<26)
#define XLLP_LCCR0_DELAY_LBIAS	(0x1u<<27)

//
// LCD Controller Control Register 1 (LCCR1)
//
#define XLLP_LCCR1_PPL(n)	((n))
#define XLLP_LCCR1_HSW(n)	((n) << 10)
#define XLLP_LCCR1_ELW(n)	((n) << 16)
#define XLLP_LCCR1_BLW(n)	((n) << 24)

//
// LCD Controller Control Register 2 (LCCR2)
//
#define XLLP_LCCR2_LPP(n)	((n))
#define XLLP_LCCR2_VSW(n)	((n) << 10)
#define XLLP_LCCR2_EFW(n)	((n) << 16)
#define XLLP_LCCR2_BFW(n)	((n) << 24)

//
// LCD Controller Control Register 3 (LCCR3)
//
#define XLLP_LCCR3_PCD(n)		((n))
#define XLLP_LCCR3_PCD_MASK	(0xffu << 0)
#define XLLP_LCCR3_ACB(n)		((n) << 8)
#define XLLP_LCCR3_API(n)		((n) << 16)
#define XLLP_LCCR3_VSP(n)		((n)<<20)
#define XLLP_LCCR3_HSP(n)		((n)<<21)
#define XLLP_LCCR3_PCP(n)		((n)<<22)
#define XLLP_LCCR3_OEP(n)		((n)<<23)
#define XLLP_LCCR3_DPC			(0x1u<<27)
#define XLLP_LCCR3_BPP(n)		((((n) & 0x7) << 24) | (((n) & 0x8) << 29))
#define XLLP_LCCR3_PDFOR(n)		((n) << 30)

//
// LCD Controller Control Register 4 (LCCR4)
//
#define XLLP_LCCR4_K1(n)		((n))
#define XLLP_LCCR4_K2(n)		((n)<<3)
#define XLLP_LCCR4_K3(n)		((n)<<6)
#define XLLP_LCCR4_REOFM0		(0x1u<<9)
#define XLLP_LCCR4_REOFM1		(0x1u<<10)
#define XLLP_LCCR4_REOFM2		(0x1u<<11)
#define XLLP_LCCR4_REOFM3		(0x1u<<12)
#define XLLP_LCCR4_REOFM4		(0x1u<<13)
#define XLLP_LCCR4_REOFM5		(0x1u<<14)
#define XLLP_LCCR4_PAL_FOR(n)	((n)<<15)
#define XLLP_LCCR4_REOFM6		(0x1u<<26)
#define XLLP_LCCR4_PIX_DIV_EQ	(0x1u<<31)


//
// LCD Controller Control Register 5 (LCCR5)
//
#define XLLP_LCCR5_SOFM1		0x00000001
#define XLLP_LCCR5_SOFM2		0x00000002
#define XLLP_LCCR5_SOFM3		0x00000004
#define XLLP_LCCR5_SOFM4		0x00000008
#define XLLP_LCCR5_SOFM5		0x00000010
#define XLLP_LCCR5_SOFM6		0x00000020
#define XLLP_LCCR5_EOFM1		0x00000100
#define XLLP_LCCR5_EOFM2		0x00000200
#define XLLP_LCCR5_EOFM3		0x00000400
#define XLLP_LCCR5_EOFM4		0x00000800
#define XLLP_LCCR5_EOFM5		0x00001000
#define XLLP_LCCR5_EOFM6		0x00002000
#define XLLP_LCCR5_BSM1			0x00010000
#define XLLP_LCCR5_BSM2			0x00020000
#define XLLP_LCCR5_BSM3			0x00040000
#define XLLP_LCCR5_BSM4			0x00080000
#define XLLP_LCCR5_BSM5			0x00100000
#define XLLP_LCCR5_BSM6			0x00200000
#define XLLP_LCCR5_IUM1			0x01000000
#define XLLP_LCCR5_IUM2			0x02000000
#define XLLP_LCCR5_IUM3			0x04000000
#define XLLP_LCCR5_IUM4			0x08000000
#define XLLP_LCCR5_IUM5			0x10000000
#define XLLP_LCCR5_IUM6			0x20000000

//                                              
// LCD Controller Control Register 6 (LCCR6)    
//                                              
#define XLLP_LCCR6_B_BLUE(n)	((n)<<0)		      
#define XLLP_LCCR6_B_GREEN(n)	((n)<<8)
#define XLLP_LCCR6_B_RED(n)		((n)<<16)
#define XLLP_LCCR6_BF_OFF		(0x1u<<31)

//
// LCD Controller Overlay Control Register OVL1C1
//
#define XLLP_OVL1C1_PPL1(n)		((n))
#define XLLP_OVL1C1_LPO1(n)		((n) << 10)
#define XLLP_OVL1C1_BPP1(n)		((n) << 20)
#define XLLP_OVL1C1_O1EN		(0x1u<<31)

//
// LCD Controller Overlay Control Register OVL1C2
//
#define XLLP_OVL1C2_O1XPOS(n)	((n))
#define XLLP_OVL1C2_O1YPOS(n)	((n) << 10)

//
// LCD Controller Overlay Control Register OVL2C1
//
#define XLLP_OVL2C1_PPL2(n)		((n))
#define XLLP_OVL2C1_LPO2(n)		((n) << 10)
#define XLLP_OVL2C1_BPP2(n)		((n) << 20)
#define XLLP_OVL2C1_O2EN		(0x1u<<31)

//
// LCD Controller Overlay Control Register OVL2C2
//
#define XLLP_OVL2C2_O2XPOS(n)	((n))
#define XLLP_OVL2C2_O2YPOS(n)	((n) << 10)
#define XLLP_OVL2C2_FOR(n)		((n) << 20)

//
// LCD Controller Cursor Control Register (CCR)
//
#define XLLP_CCR_CURMS(n)	((n))
#define XLLP_CCR_CXPOS(n)	((n) << 5)
#define XLLP_CCR_CYPOS(n)	((n) << 15)
#define XLLP_CCR_CEN		(0x1u<<31)

//
// LCD Controller Command Control Register (CMDCR)
//
#define XLLP_CMDCR_SYNC_CNT(n)	((n))

//
// LCD Controller Panel Read Status Register (PRSR)
//
#define XLLP_PRSR_DATA(n)		((n) & 0xff)
#define XLLP_PRSR_A0			0x00000100
#define XLLP_PRSR_ST_OK			0x00000200
#define XLLP_PRSR_CON_ST		0x00000400

//
// LCD Controller Status Register (LCSR0)
//
#define XLLP_LCSR0_LDD			0x00000001
#define XLLP_LCSR0_SOF0			0x00000002
#define XLLP_LCSR0_BER			0x00000004
#define XLLP_LCSR0_ABC			0x00000008
#define XLLP_LCSR0_IU0			0x00000010
#define XLLP_LCSR0_IU1			0x00000020
#define XLLP_LCSR0_OU			0x00000040
#define XLLP_LCSR0_QD			0x00000080
#define XLLP_LCSR0_EOF0			0x00000100
#define XLLP_LCSR0_BS0			0x00000200
#define XLLP_LCSR0_SINT			0x00000400
#define XLLP_LCSR0_RD_ST		0x00000800
#define XLLP_LCSR0_REOF0		(0x1u<<13)
#define XLLP_LCSR0_REOF1		(0x1u<<14)
#define XLLP_LCSR0_REOF2		(0x1u<<15)
#define XLLP_LCSR0_REOF3		(0x1u<<16)
#define XLLP_LCSR0_REOF4		(0x1u<<17)
#define XLLP_LCSR0_REOF5		(0x1u<<18)
#define XLLP_LCSR0_REOF6		(0x1u<<19)
#define XLLP_LCSR0_CMD_INTR		0x00001000
#define XLLP_LCSR0_BER_CH(n)	((n)<<28)

//
// LCD Controller Status Register (LCSR1)
//
#define XLLP_LCSR1_SOF1		0x00000001
#define XLLP_LCSR1_SOF2		0x00000002
#define XLLP_LCSR1_SOF3		0x00000004
#define XLLP_LCSR1_SOF4		0x00000008
#define XLLP_LCSR1_SOF5		0x00000010
#define XLLP_LCSR1_SOF6		0x00000020
#define XLLP_LCSR1_EOF1		0x00000100
#define XLLP_LCSR1_EOF2		0x00000200
#define XLLP_LCSR1_EOF3		0x00000400
#define XLLP_LCSR1_EOF4		0x00000800
#define XLLP_LCSR1_EOF5		0x00001000
#define XLLP_LCSR1_EOF6		0x00002000
#define XLLP_LCSR1_BS1		0x00010000
#define XLLP_LCSR1_BS2		0x00020000
#define XLLP_LCSR1_BS3		0x00040000
#define XLLP_LCSR1_BS4		0x00080000
#define XLLP_LCSR1_BS5		0x00100000
#define XLLP_LCSR1_BS6		0x00200000
#define XLLP_LCSR1_IU2		0x02000000
#define XLLP_LCSR1_IU3		0x04000000
#define XLLP_LCSR1_IU4		0x08000000
#define XLLP_LCSR1_IU5		0x10000000
#define XLLP_LCSR1_IU6		0x20000000

//
// LCD Controller Interrupt ID Register (LIIDR)
//
#define XLLP_LIIDR_IFrameID(n) ((n))

//
// LCD Controller TMED RGB Seed Register (TRGBR)
//
#define XLLP_TRGBR_TRS(n) ((n))
#define XLLP_TRGBR_TGS(n) ((n) << 8)
#define XLLP_TRGBR_TBS(n) ((n) << 16)

//
// LCD Controller TMED Control Register (TCR)
//
#define XLLP_TCR_TM2S		0x00000001
#define XLLP_TCR_TM1S		0x00000002
#define XLLP_TCR_TM2En		0x00000004
#define XLLP_TCR_TM1En		0x00000008
#define XLLP_TCR_TVBS(n)	((n) << 4)
#define XLLP_TCR_THBS(n)	((n) << 8)
#define XLLP_TCR_TSCS(n)	((n) << 12)
#define XLLP_TCR_TED		0x00004000

//
// LCD Controller DMA Frame Descriptor Address Registers (FDADRx)
//
#define XLLP_FDADR_DESCADDR(n)	((n) & 0xFFFFFFF0)

//
// LCD Controller DMA Frame Source Address Registers (FSADRx)
//
#define XLLP_FSADR_SRCADDR(n)	((n) & 0xFFFFFFF8)

//
// LCD Controller DMA Frame ID Registers (FIDRx)
//
#define XLLP_FIDR_FRAMEID(n)		((n) & 0xFFFFFFF8)

//
// LCD Controller DMA Command Registers (LDCMDx)
//
#define XLLP_LDCMD_LEN(n)			((n)&0x1ffffc)
#define XLLP_LDCMD_EOFINT			(0x1u<<21)
#define XLLP_LDCMD_SOFINT			(0x1u<<22)
#define XLLP_LDCMD_LSTDES_EN_MASK	(0x3u<<23)
#define XLLP_LDCMD_PAL				(0x1u<<26)

//
// LCD Controller DMA Frame Branch Registers (FBRx)
//
#define XLLP_FBR_BRA		(0x1u<<0)
#define XLLP_FBR_BINT		(0x1u<<1)
#define XLLP_FBR_SRCADDR(n)	((n)&0xfffffff0)

typedef struct  
{
	XLLP_VUINT32_T	mlccr0;			//0x46000000
	XLLP_VUINT32_T	mlccr1;			//0x46000004
	XLLP_VUINT32_T	mlccr2;			//0x46000008
	XLLP_VUINT32_T	mlsadd;			//0x4600000C
	XLLP_VUINT32_T	mlfrmcnt;		//0x46000010
} XLLP_MINILCD_REGISTERS_T;

//
// Mini LCD Controller Control Register 0 (MLCCR0)
//
#define XLLP_MLCCR0_PCD(n)		((n))
#define XLLP_MLCCR0_HSP(n)			((n) << 8)
#define XLLP_MLCCR0_VSP(n)			((n) << 9)
#define XLLP_MLCCR0_PCP(n)			((n) << 10)
#define XLLP_MLCCR0_OEP(n)			((n) << 11)

//
// Mini LCD Controller Control Register 1 (MLCCR1)
//
#define XLLP_MLCCR1_PPL(n)	((n))
#define XLLP_MLCCR1_HSW(n)	((n) << 10)
#define XLLP_MLCCR1_ELW(n)	((n) << 16)
#define XLLP_MLCCR1_BLW(n)	((n) << 24)

//
// Mini LCD Controller Control Register 2 (MLCCR2)
//
#define XLLP_MLCCR2_LPP(n)	((n))
#define XLLP_MLCCR2_VSW(n)	((n) << 10)
#define XLLP_MLCCR2_EFW(n)	((n) << 16)
#define XLLP_MLCCR2_BFW(n)	((n) << 24)

//
// Mini LCD SRAM Address Register (MLSADD)
//
#define XLLP_MLSADD_FRADD(n)	((n)&0xFFFFFFF8)

//
// Mini LCD Frame Count Register (MLFRMCNT)
//
#define XLLP_MLFRMCNT_FRCOUNT(n)	((n))
#define XLLP_MLFRMCNT_FWKUP_EN		(0x1u<<30)
#define XLLP_MLFRMCNT_WKUP_EN		(0x1u<<31)

#ifdef __cplusplus
}
#endif

#endif
